DESIGN VERIFICATION

Veriest's methodologies, planning and execution has won it a leading role in cutting-edge verification.

 

Our extensive knowledge in a wide range of the industry’s leading tools, combined with a deep understanding of VLSI verification needs allows us to plan the right strategy for each task and then execute it, placing the right people with the right tools.

 

We believe that a successful verification project is based on the following four essential elements:
 

 

1 > Goal Definition

We accurately define the scope of required tasks, through a pre-defined process that delivers a detailed testing plan and/or coverage plan.

 

2 > Strategy

We tailor the most favorable work plan to meet verification goals.

We thoroughly map out the project taking into consideration constraints such as schedule, tools, resources, existing IPs and verification components.

This ensures accurate policy implementation and secures pitfall avoidance, preventing costly mistakes.

 

 

 

 

 

 

 

3 > Execution

Using our comprehensible methodologies, we implement a robust and reusable verification environment.

Choosing the relevant engineer for each task and making the right on-the-fly managerial decisions, results in successful project coverage that eventually leads to first pass functional silicon and FPGAs.

We protect against re-spin and guarantee product confidence.

 

 

 

4 > Clarity

We understand the fundamental importance of accurate status reports and precision empirical measurements, such as functional coverage and assertions, required for verification convergence follow-up.

By delivering clear reports and adhering to our work plan, we enable the project management team to make dead-on right decisions at all times.